Why the United States is desperately suppressing Huawei: The US Attorney General’s speech tells the reason
Why is the United States doing all it can to suppress Huawei?
On February 6, 2020, U.S. Attorney General William Barr attended the “China Initiative Meeting” at the invitation of the Washington think tank “Center for Strategic & International Studies” (CSIS) Conference) and gave a keynote speech.
In the speech, William Barr talked about the unprecedented challenge posed by China’s technological offensive to the United States and Huawei’s leadership in 5G.
He said the United States has been a world leader in innovative technology since the 19th century. It is America’s technological prowess that keeps us prosperous and secure. Our standards of living, our expanding economic opportunities for young people and future generations, and our national security all depend on our continued technological leadership.
William Barr believes that 5G technology is at the center of the emerging technological and industrial world. Essentially, communication networks are no longer just for communication. It is evolving into the next-generation internet, the industrial internet, and the central nervous system of the next-generation industrial systems that will depend on that infrastructure.
China has taken the lead in 5G, capturing 40% of the global infrastructure market. And, for the first time ever, the United States is not leading the next era of technology.
It is estimated that the Industrial Internet, powered by 5G, will generate an economic opportunity of up to $23 trillion by 2025. If China comes out on top in 5G, it will dominate the opportunities presented by a series of intertwined emerging technologies that rely on 5G platforms.
Currently, Huawei has become a leading supplier on every continent except North America. There are no equipment suppliers in the US. China’s main competitors are Finnish company Nokia (17%) and Swedish company Ericsson (14%).
China is using various forces to expand its global 5G market share. The total market size for 5G infrastructure is estimated at $76 billion. China is offering more than $100 billion in incentives to help customers buy its equipment.
Additionally, 5G is based on a range of technologies, including semiconductors, optical fibers, rare earths and materials. China has started to localize all of these elements and is no longer dependent on foreign suppliers.
William Barr said that in the next five years, the global territory and application dominance of 5G will be determined. The question is, within this window, can the United States and our allies compete enough with Huawei to retain and capture enough market share to maintain a competitive position long enough and strong enough to avoid ceding dominance to China. Time is short, and we and our allies must act quickly.
Obviously, Huawei is also ready. “We have nowhere to go except victory,” Huawei said.
On June 22, local time in the United States, Microsoft’s market value exceeded $2 trillion; among them, Microsoft’s stock price touched a maximum of $265.79 during the session, and the closing price of the day closed at $265.51.
In the global market capitalization ranking, the companies behind Apple and Microsoft are Saudi Aramco, Amazon, and Alphabet, the parent company of Google. Their market capitalizations are about $1.9 trillion, $1.8 trillion, and $1.6 trillion, respectively. Among them, Saudi Aramco briefly crossed the threshold of US$2 trillion in December 2019, and its current market value is about US$1.9 trillion. Saudi Aramco has become one of the world’s leaders in oil production and reserves.
In 2019, Microsoft just exceeded 1 trillion US dollars. In just two years, Microsoft became the second company with a market value of more than 2 trillion US dollars after Apple. Affected by the epidemic, people’s demand for remote work has promoted the development of cloud computing platforms. As the world’s largest software company, Microsoft has brought a lot of revenue to Microsoft in addition to its best-selling operating system and Microsoft Office series software. The layout in cloud computing and AI has also brought new vitality to Microsoft.
New business success helps Microsoft break through 2 trillion
Microsoft’s rapid growth is inseparable from the success of its latest business.
With the advent of the internet and mobile internet era, Microsoft once fell behind newer rivals like Google and more nimble rivals like Apple when it comes to social media and internet search.
Things have changed at Microsoft since Satya Nadella took the helm.
In 2014, Satya Nadella became the third CEO of Microsoft, making technology giants like Microsoft vigorous again and quickly growing into the world’s most growing technology company, Satya Nadella Pull successfully reshaped Microsoft into one of the largest resellers of cloud computing software in the world.
Before Satya Nadella took office, Microsoft was in a period of declining performance, dubbed by the media as a “fading empire.” After he took office, Satya Nadella was ordered to focus on the frontier fields such as cloud computing, mobile software and artificial intelligence. In addition, the new algorithm, the launch of Microsoft Azure cloud services, etc., have brought Microsoft back to life.
In 2020, the intelligent cloud business accounted for 33.8% of Microsoft’s 2020 revenue, becoming the largest of the three major business segments for the first time, up from 31% in 2019.
On June 16 this year, Microsoft’s board of directors unanimously approved the current CEO Satya Nadella as the new chairman, taking charge of Microsoft, and holding two positions like this. Satya Nadella is the first after Bill Gates. two people.
Traditional software and hardware are still strong
Microsoft is an attractive name in tech, especially when it comes to software and hardware that consumers reach.
The Microsoft Office series software is still one of the most popular office suites in the world, and the Windows system still firmly occupies the first place in the global system market share. According to the latest media news, Microsoft will hold a new generation of operating system on the 25th, Beijing time. At the Windows 11 conference, Windows 11 will also usher in a new “look”.
In addition, in addition to the traditional Windows series of software and hardware, Microsoft has also invested heavily in the game industry and successfully built the Xbox platform.
Since Microsoft released the Xbox in 2001, in the field of game hardware, Microsoft’s Xbox has formed a tripartite situation with Sony PS and Nintendo NS.
Xbox is a home video game console developed by Microsoft. The first one was released in 2001. The second-generation Xbox 360, the third-generation Xbox One, and the fourth-generation Xbox Series X (the new Xbox) were released in 2005. , 2013, 2019 releases.
With Microsoft’s blessing in hardware and software, the game consoles released by Microsoft have a number of technological advancements. Take the fourth-generation Xbox Series X as an example, it won the 2020 Innovation Design Award. The official reason for the award is that it is equipped with AMD’s latest Zen 2 architecture CPU and RDNA 2 architecture GPU, and the floating point number reaches 12T. In addition, it is equipped with a 1TB PCIe 4.0 SSD, which can expand the capacity through a dedicated external memory card.
At the E3 exhibition that just passed this year, Microsoft’s performance was also very good.
The “Halo: Infinite” launched by Microsoft and B agency is considered by the audience to be the most anticipated game, and there are new racing games such as “Forza Motorsport: Horizon 5”. expectations.
According to information released by Microsoft, in the second fiscal quarter ended December 31, 2020, compared with the same period of the previous fiscal year, Microsoft’s revenue was $43.1 billion, an increase of 17%. In the second quarter, Xbox hardware revenue grew 86%, driven by the launch of the Xbox Series X/S, and gaming revenue grew 51%.
ON Semiconductor’s energy-efficient solutions empower robot innovation and help upgrade industrial automation
“Industrial automation simply refers to the shift from human manufacturing to robotic manufacturing, involving various technologies such as cyber-physical systems (CPS), Internet of Things (IoT)/industrial Internet of Things (IIoT), Cloud Computing and artificial intelligence (AI). , It can realize economic growth and maximize profits, improve production efficiency, and avoid hidden dangers of manpower when performing certain tasks. ON semiconductor provides comprehensive, energy-efficient and innovative semiconductor solutions for industrial automation. Among them, the construction block diagram of the robotic semiconductor solution is shown in Figure 1.
Industrial automation simply refers to the shift from human manufacturing to robotic manufacturing, involving various technologies such as cyber-physical systems (CPS), Internet of Things (IoT)/industrial Internet of Things (IIoT), Cloud Computing and artificial intelligence (AI). , It can realize economic growth and maximize profits, improve production efficiency, and avoid hidden dangers of manpower when performing certain tasks. ON Semiconductor provides comprehensive, energy-efficient and innovative semiconductor solutions for industrial automation. Among them, the construction block diagram of the robotic semiconductor solution is shown in Figure 1.
Figure 1: Block diagram of industrial automation-robotic semiconductor solution construction
Designers can use ON Semiconductor’s brushless DC motor (BLDC) controllers to achieve BLDC motor control, such as high-performance second-generation single-motor controllers MC33035, NCV33035 and MC33033, or MC33039 for speed closed-loop control. For supporting power devices, ON Semiconductor offers the Power Trench N-channel MOSFET series, with avalanche breakdown voltage ranging from 40 V to 150 V or even higher, depending on the application.
A dedicated inverter network is used to drive the BLDC phase windings of the universal arm brake and end effector. This inverter system contains Power Trench power devices with a withstand voltage of up to 150 V. The following table lists some members of ON Semiconductor’s Trench series of discrete devices, as well as recommended three-phase gate (pre) drivers:
In order to feed transient large currents and large voltages to low-voltage microprocessors that are more sensitive to noise, digital isolators may be required; at the same time, depending on the power supply architecture, isolated driver ICs may also be required.
The functional part of the inverter and higher power application scenarios can be implemented using intelligent power modules (IPM), such as ON Semiconductor’s NFVA35065L32. This AEC-Q and AQG324 certified 50 A automotive-grade high-voltage module integrates 650V field-stop trench IGBT devices, which can withstand higher induced voltage spikes. NFVA35065L32 also integrates a wealth of protection functions such as over-current shutdown, under-voltage lockout (UVLO), over-temperature, over-temperature monitoring and fault telemetry functions, which can meet all your requirements for driving today’s three-phase BLDC motor applications, and is stable, reliable and excellent The high reliability. NFVA33065/34065L32 are respectively 650 V 30 A / 40A IPM. NFVA225 / 235 / 25012NP2TC is 1200V 25A/35A/50A IPM.
In the higher power range, ON Semiconductor has introduced 1200 V 25 A, 35 A and 50 A PIM modules, providing converter-inverter-brake (CIB) and converter-inverter (CI) Architecture; and 650V 50A PIM module, providing converter-inverter-interleaved PFC (CIP) architecture, which is ideal for industrial automation-robot applications. In the future, 1200 V and 650 V products ranging from 25 A to 200 A will be launched, including the Compact and QLP-74 series, to achieve full coverage of the power spectrum to meet various power requirements. The following table lists the TMPIM modules that ON Semiconductor has launched.
1200 V 25A
1200 V 35A
1200 V 50A
650 V 50A
For higher voltage applications, the APM17M series of smart power inverters are required, such as NXV10H250XT1 (100 V, Idmax = 250 A, 1 mΩ) and NXV10H350XT1 (100 V, Idmax = 310 A, 1 mΩ). These power inverter units can be operated in three-phase (3 APM17M) or six-phase (6 APM17M).
The package design of this series has low parasitic inductance (machine vision
One of the key elements to achieve full automation is that the machine can perceive the surrounding environment: the machine can observe and recognize nearby objects, and distinguish and discern the next action, thereby maintaining safety and avoiding conflict. ON Semiconductor is one of the leaders in industrial machine vision. It is committed to empowering machines to surpass human vision with a full range of imaging solutions and leading technologies, and to promote innovation in industrial automation.
In the solution shown in the figure below, the 1/4-inch, 1 million-pixel AR0144 CMOS image sensor adopts the best third-generation global shutter technology, which is extremely suitable for machine vision applications. The NCP163, which uses ultra-low noise and ripple, provides power to the AR0144, allowing the AR0144 to get clear images even in low light.
The NCP3170 synchronous rectifier Buck provides main power output for point-of-load (POL) power supply. The step-down regulator has an output capacity of 3.3V/3A, which can provide sufficient power for other downstream devices of ON Semiconductor. The NCP3170 also has Some key features such as thermal shutdown and output short circuit. Electronic fuses (e-Fuses) can also be used on DC BUS to suppress voltage/current surges and solve the timing problems of multiple power supplies.
Figure 2: Industrial automation-machine vision semiconductor block of robots
For low-light and distance-sensitive detection and measurement applications, use single-photon-sensitive high-performance solid-state sensors or silicon photomultiplier (SiPM)/single-photon avalanche diodes (SPAD) and Microcell arrays, and deploy LiDAR to detect light And ranging, can generate a digital 3D image of the desired target. Due to the high gain, high bandwidth and high sensitivity of the photomultiplier, more accurate images can be generated. ARRAYRDM-0116A10-DFN, a member of the R series SiPM sensor series, is suitable for 905/940 nm LiDAR applications. This 1×16 pixel array format and unique fast output, at the same time, the sensitivity of 905 nm wavelength is higher than 100 kA/W , These excellent features provide a feasible solution for factory automation scanning.
The main power supply consists of several switching regulators, converters and LDOs, which provide suitable working voltages for photomultiplier arrays, laser diodes, gallium nitride (GaN) drivers, analog front-end bias circuits, and time-to-digital converters. In order to provide -24V or -45V negative voltage to the Microcell array, you can use the NCV898031 non-synchronous (SEPIC) boost controller. The NCV898031 integrates a MOSFET driver to drive the FDMC86116LZ 100V 7.5A 103mΩ Rdson MOS. The boost rectifier part uses ultra-fast recovery Automotive grade diode SURA8120T3G (1A 150V Trr
NCV887102D1R2G automotive grade boost IC can be used to drive FDMC86116LZ MOSFET, which can provide 80 V power to the laser diode. The NCV890100MWTXG buck regulator has an internal integrated switching MOSFET, suitable for outputting 3.7 V and 5.5 V power supplies. This 2 MHz switching frequency power supply can handle input voltages up to 36 V and is suitable for small size applications. It requires 3.7 V or 5.5 Ideal for applications with V output voltage.
NCP59300 is a low noise and low ripple linear regulator with 3A current output. NCV8114ASN250T1G is a 300 mA LDO with high PSRR and low quiescent current. NCV8187AMT120TAG can provide 1.2A output. These LDOs provide power for the FPGA, NC7WZ17P6X clock buffer, NCV809RTRG voltage monitor/microprocessor, and clock oscillator in the time-to-digital converter. At the same time, these LDOs are all output from the DC-DC step-down converter of the NCV890100MWTXG controller. powered by.
Artificial intelligence (AI) voice interaction applications are becoming more and more popular, and further penetration in the industrial field. The LC823455 single chip (SoC) that can be used with the host AI system is a 32-bit high-resolution audio digital signal processing (DSP) core with multiple proprietary DSP accelerators (codecs) for audio noise reduction , Beamforming and echo cancellation. It is a multi-core architecture (2 ARM M3+1 DSP Core), which can provide powerful processing capabilities when connected with large-scale programs.
NCP2823 is a class D audio amplifier used to drive 4 Ω to 8 Ω output speakers. The power supply for this audio amplifier is NCP3170 DC-DC to provide 5 V power. Connected to the 5 V POL power supply is a series of high-noise suppression linear regulators (LDO)-NCP170. Its ultra-low quiescent current consumption is ideal for battery-powered applications. It can be realized by the RSL10 platform that supports Bluetooth 5. Interconnection between devices.
QCS-AX-D12/QCS-AX2-D12 is a dual-band dual-concurrent WiFi 6/6E chip M that supports 802.11ax/ac/n/a/g/b standards. It is the industry’s first 8-space stream that supports 8×8 And multi-user multiple input multiple output (MU-MIMO) chip. Its 8 x 8 + 4 x 4 dual-band concurrency (DBDC) and OFDMA (orthogonal frequency division multiple access) can make the best and efficient use of bandwidth. QCS-AX-D12/QCS-AX2-D12 access points support up to 10 Gbps and eight spatial streams (Eight Simultaneous Spatial Streams).
In the power supply part, the full-bridge rectifier GBPC3506 is used to rectify the AC to DC voltage, and the 3-channel interleaved CCM PFC IC FAN9673Q can provide the power supply with a high power factor of PF=1. The PFC power MOS recommends the use of 600 V30 A SuperFET III NTPF082N65S3F , 650V30A SiC diode FFSP3065A is a PFC rectifier diode. The zero current recovery characteristic of SiC diode achieves higher efficiency and better EMC characteristics and lower temperature rise.
In 500W-5KW applications, the use of full-bridge LLC and secondary synchronous rectification output or full-bridge rectification output can achieve efficiency higher than 95% while providing safety isolation. NCP(V)4390 is an LLC controller that uses adaptive dead time (to maintain the best body diode conduction time) control, and integrates a secondary synchronous rectification drive signal to achieve the best energy efficiency performance and the most simplified peripheral Device. NCP(V)4390 primary side MOS is zero voltage switching (ZVS), secondary side MOS/diode is zero current switching (ZCS) to minimize power consumption. The secondary can provide a variety of winding configurations to adapt to various required bus voltages. For example, 48 V bus voltage is used for the integrated power module of BLDC motors, and 12 V is used for image sensors, lidar systems, and multiphase converters. Smart power stage (SPS), radio board/antenna and POL power supply for voice and audio processing.
Multiphase DC-DC converter
Need to use multi-phase controller such as NCP81233, integrated MOSFET driver NCP5339, depending on the circuit needs to use e-Fuse or load switch IC to provide reverse current protection, input overvoltage clamp or overcurrent protection.
For applications with higher power requirements, the phase multiplier NCP81162 can be used. Two-phase or three-phase converters can be used to power multi-core system single-chip platforms, such as NCV81277 or NCV81275A multi-phase controllers, with MOSFET driver ICs such as NCV3025833 or NCV303150.
The 5 V DC power supply for the switching regulator is a 10 A single-phase buck converter. The converter is composed of NCV881930 control IC, driving two separate 40V78 AN channel MOSC NVMFS5C460NL. The remaining low-power power supply with an output voltage range of 0.75 V to 3.3 V is provided by the NCV6323 internal compensation regulator (integrated MOSFET and MOSFET driver).
Robot is one of the key technologies to realize industrial automation. ON Semiconductor provides comprehensive energy-efficient semiconductor solutions for robot building blocks such as motor control, machine vision, lidar, voice control, wireless connection, power supply, etc., to support and promote innovation.
“Tuning fork level gauge is a level switch widely used in industrial environment, often called tuning fork level switch or tuning fork level controller, including tuning fork level switch, tuning fork level switch and other level measuring instruments. It is designed using the principle of tuning fork vibration, and uses piezoelectric devices to drive and detect the vibration of the tuning fork rod.
Tuning fork level gauge is a level switch widely used in industrial environment, often called tuning fork level switch or tuning fork level controller, including tuning fork level switch, tuning fork level switch and other level measuring instruments. It is designed using the principle of tuning fork vibration, and uses piezoelectric devices to drive and detect the vibration of the tuning fork rod. When the material is not in contact, the tuning fork vibrates freely at the resonance frequency. When the tuning fork is in contact with the material to be tested, the vibration amplitude of the tuning fork is significantly reduced, and the output signal amplitude of the piezoelectric detection device decreases accordingly, and the signal change is detected by the intelligent circuit Analyze and output a switching signal. Simply put, the tuning fork generates mechanical vibration under the excitation of the piezoelectric device, and this vibration has a certain frequency and amplitude.
In some highly corrosive medium environments, the tuning fork level gauge in the prior art is easily corroded by the medium, which changes the vibration signal received by the piezoelectric ceramic, so that the tuning fork level gauge is reliable when monitoring the level. The performance is reduced, and false alarms are prone to occur. However, there is a lack of monitoring of tuning fork rod corrosion in the prior art.
In response to this situation, the R&D engineers of Shenzhen Jiwei Automation Technology Co., Ltd. made improvements to the existing monitoring methods and systems on the basis of many tests, and proposed a new type of tuning fork level meter and its monitoring level The method and system include the following steps: the piezoelectric ceramic senses the vibration of the tuning fork rod and outputs the corresponding electrical signal, the processor collects the voltage amplitude of the electrical signal in real time, and judges whether the tuning fork rod is in contact with the material according to the voltage amplitude; at the same time monitoring The frequency change trend of the electrical signal, judge whether the tuning fork rod is in contact with the material according to the voltage amplitude, and judge whether the tuning fork rod is corroded according to the frequency change trend; in the state of not contacting the material, judge the degree of corrosion according to the frequency change value, when it is corroded When the degree is serious and affects the reliability of the equipment, a corrosion alarm is output.
Practice has proved that the multiple voltage amplitudes sampled continuously are compared with the preset voltage upper limit value, voltage lower limit value and voltage median value. According to the comparison result, it is judged whether the tuning fork stick is in contact with the material. Since the sampled voltage amplitude is multiple continuous, and through multiple comparisons with the voltage upper limit value, the voltage lower limit value and the voltage median value, even if the tuning fork level meter is momentarily impacted by an external force or electrical interference, the voltage The amplitude is instantaneously unstable, and it does not affect the processor’s judgment of the use state of the tuning fork rod, and can monitor the level more accurately and reliably.
Ministry of Industry and Information Technology: “Double G and Double Promotion” work has steadily advanced, and the proportion of 4G users has declined slightly
On March 19, the Ministry of Industry and Information Technology announced the economic operation of the communications industry from January to February 2020. The scale of 4G users (1.262 billion) accounted for 79.9% of the total number of mobile phone users, a decrease of 0.2 percentage points from the end of the previous year. Among them, the number of mobile phone users has entered a stable period, and the proportion of 4G users has declined slightly.
The scale of fixed broadband access users exceeded 450 million, and the scale of gigabit fixed broadband access users continued to expand. As of the end of February, the total number of fixed Internet broadband access users of the three basic telecommunications companies reached 452 million, a net increase of 2.83 million over the end of the previous year.Among them, there are 420 million optical fiber access (FTTH/O) users, accounting for 40% of the total fixed Internet broadband access users.
92.9%. Broadband users continued to migrate to high speeds. Fixed Internet broadband access users with an access rate of 100 Mbps and above reached 384 million, accounting for 85% of the total number of users.
The work of “Double G and Dual Delivery” has been steadily advanced, and the number of fixed Internet broadband access users with an access rate of more than 1000M has reached 1.97 million
. As of the end of February, the total number of mobile phone users of the three basic telecommunications companies reached 1.58 billion, which was basically the same as the same period last year. Among them, the scale of 4G users (1.262 billion) accounted for 79.9% of the total number of mobile phone users, a decrease of 0.2 percentage points from the end of the previous year.
Intel hopes that after outsourcing, it can focus more on breakthroughs in the manufacturing process.
Market research company TrendForce indicated in a report released recently, the world’s largest chip foundry TSMC will use the 5nm process to produce Intel Core i3 chips.
At present, Intel has outsourced its entry-level chip series to TSMC and will start production in the second half of this year.
In Intel’s fourth-quarter earnings conference call, the incoming Intel CEO Pat Gelsinger (Pat Gelsinger) said that he believes that most of the company’s products will still be produced in-house in 2023, although it is “probable”. External foundries are used more than in the past.
In addition, TrendForce said that TSMC expects to use the 3nm process to produce high-end chips for Intel in the second half of 2022.
According to TrendForce, Intel has long outsourced the production of a large number of non-CPU chips to Taiwan semiconductor Manufacturing Co (TSMC) and United Microelectronics (UMC), accounting for approximately 15% to 20% of its output. Combined with Intel’s annual revenue of 70 billion U.S. dollars, this 15% to 20% outsourcing may be worth 10.5 billion to 14 billion U.S. dollars in 2020.
Intel’s outsourcing of low-end processors this time allows it to maintain a competitive advantage, and it is responsible for the production of higher-profit chips internally.
Compared with TSMC, Intel is still struggling with cutting-edge process technology for its 10nm and 7nm processes. Intel announced on its official website that the company’s board of directors has appointed Pat Kilsinger as the new CEO and mentioned in the announcement. Significant progress has been made in 7nm process technology, but due to the yield problem, Intel’s current technology node is still stuck at 10nm.
In addition to the processor, Intel will abandon the plan of self-developed second-generation discrete graphics with a 7nm process, and instead seek TSMC for foundry, hoping to focus on achieving breakthroughs in the process, and then counter the rise of Nvidia.
“Briefly describe the working principle of the blockchain. A wants to send money to B. This transaction is represented by a block on the network, and the block is broadcast to all participants in the network. The participants agree that the transaction is valid, and the area is changed. Blocks are added to the chain, which provides a permanent and transparent record of transactions, and funds are transferred from A to B. One account on the whole network, everyone can find it.
How Blockchain Works
Briefly describe the working principle of the blockchain. A wants to send money to B. This transaction is represented by a block on the network, and the block is broadcast to all participants in the network. The participants agree that the transaction is valid, and the area is changed. Blocks are added to the chain, which provides a permanent and transparent record of transactions, and funds are transferred from A to B. One account on the whole network, everyone can find it.
What we can see is that in this distributed database, the accounting is not controlled by individuals or a centralized subject, but is maintained and jointly recorded by all nodes. All single nodes cannot be tampered with. If you want to tamper with a record, you need to control more than 51% of the nodes or computing power of the entire network at the same time. The number of nodes in the blockchain is infinite and new nodes are being added all the time. This basically is impossible.
The essence of the blockchain is a public accounting system for mutual verification. What this system does is to record all transactions that occur in all accounts. Every change in the amount of each account will be recorded in the general ledger of the entire network. And everyone has a complete ledger in their hands. Everyone can independently count all the accounts of each account in the Bitcoin system in history, and can also calculate the current balance of any account.
Since all data is open and transparent, anyone can view its source code, and people will trust this decentralized system without worrying about whether there is any conspiracy hidden in it.
The 6-layer model of blockchain
The basic model of blockchain is divided into 6 layers: data layer, network layer, consensus layer, incentive layer, contract layer, and application layer. Each layer completes a core function and cooperates with each other to realize a decentralized trust mechanism.
Data layer: data block, chain structure, timestamp, hash function, Merkle tree, asymmetric encryption;
Network layer: P2P (peer-to-peer) network, propagation mechanism, verification mechanism;
Consensus layer: pow (workload proof), pos (stake proof), dpos (share authorization proof);
Incentive layer: issuance mechanism, distribution mechanism;
Contract layer: script code, algorithm mechanism, smart contract;
Application layer: programmable currency, programmable finance, programmable society;
Most of them belong to the technical category, so I won’t go into too much detail.
The development of blockchain
Blockchain 1.0: Programmable currency represented by Bitcoin, which refers more to innovations in the field of digital currency, such as currency transfer, redemption and payment systems;
Blockchain 2.0: Blockchain-based programmable finance. It is more about some innovations in contracts, especially commercial contracts and innovations in transactions, such as stocks, securities, loans, clearing and settlement, so-called smart contracts, etc.
Blockchain 3.0: The application of blockchain in other industries. It corresponds more to the transformation of human organization, including health, science, culture and blockchain-based justice, voting, etc.
Basic types of blockchains:
A public chain refers to a blockchain in which anyone in the world can read and send transactions, and transactions can be effectively confirmed, and can also participate in the consensus process.
The public chain has the following characteristics:
1. Protect users from the influence of developers. In the public chain, program developers have no right to interfere with users, and blockchain can protect their users;
2. The access threshold is low, anyone can access, as long as there is a computer that can connect to the Internet, it can meet the basic access conditions;
3. All data is public by default, and each participant in the public chain can see all transaction records of the entire distributed ledger.
A private chain refers to a blockchain whose write permission is only in the hands of one organization, in order to limit read permission or open permission to the outside world.
The private chain has the following characteristics:
1. The transaction speed is very fast. The transaction speed of a private chain can be faster than any other blockchain, even close to the speed of a regular database that is not a blockchain. This is because even a small number of nodes have a high degree of trust, and each node is not required to verify a transaction.
3. The transaction cost is greatly reduced or even zero The private chain can conduct completely free or at least very cheap transactions. If one entity controls and handles all transactions, then they no longer need to be charged for the work.
4. It helps to protect basic products from being destroyed. The use of private chains by banks and traditional financial institutions can ensure their existing interests, and even the original ecosystem is not destroyed.
A consortium chain refers to a blockchain whose consensus process is controlled by pre-selected nodes. Only for members of a specific group and limited third parties, multiple pre-selected nodes are designated as bookkeepers, and the generation of each block is jointly determined by all pre-selected nodes.
Several characteristics of the alliance chain:
1. The transaction cost is cheaper. Transactions only need to be verified by a few trusted nodes with high computing power, without the need for confirmation by the entire network.
2. Nodes can be well connected, failures can be quickly repaired by manual intervention, and allow the use of consensus algorithms to reduce block times, thus completing transactions faster.
3. If the read permission is restricted, it can provide better privacy protection. Fourth, it is more flexible. A community or company running a private blockchain can easily modify the rules of that blockchain, restore transactions, modify balances, etc., if needed.
Consensus mechanism of blockchain
The purpose of the consensus mechanism of the blockchain is to solve the problem of trust, to solve the problem of trust between two complete strangers. Verification and confirmation of transactions are completed in a very short period of time through voting by special nodes.
There are many consensus mechanisms on the blockchain, and not all of them are suitable for all specific application scenarios. Consensus needs to be discussed in specific application scenarios. Here we discuss the three most common consensus mechanisms:
1. Proof of Work
Short for Pow, it can usually only be proven from the results because monitoring the work process is often tedious and inefficient. Bitcoin uses the pow mechanism during block generation.
Pow relies on machines to perform mathematical operations to obtain accounting rights, which consumes a lot of resources, has a high consensus mechanism, and is weakly regulated. At the same time, each time a consensus is reached, the entire network needs to participate in the calculation, and the performance efficiency is relatively low. In terms of fault tolerance, 50% of the entire network is allowed. Node error.
Advantages of Pow: Completely decentralized, nodes come in and out freely
Disadvantages of Pow: At present, Bitcoin has attracted most of the computing power in the world. It is difficult for other blockchain applications that use the Pow consensus mechanism to obtain the same computing power to ensure their own security. Mining causes a lot of waste of resources. period is longer.
2. Proof of Equity
Referred to as POS, the proof-of-stake mechanism works in such a way that when a new block is created, the miner needs to create a “coin right” transaction, which sends some coins to the miner itself in a pre-set ratio.
The proof-of-stake mechanism reduces the mining difficulty of nodes proportionally according to the proportion and time of tokens owned by each node and according to the algorithm, thereby speeding up the search for random numbers. This consensus mechanism can shorten the time required to reach consensus, but essentially still requires nodes in the network to perform mining operations. Therefore, the PoS mechanism does not fundamentally solve the problem that the PoW mechanism is difficult to apply to the commercial field.
Advantages of POS: It shortens the time for reaching consensus to a certain extent, and does not require a lot of energy to mine.
Disadvantages of POS: mining is still required, and it does not essentially solve the pain points of commercial applications; all confirmations are only a probabilistic expression, not a deterministic thing, theoretically, there may be other attack effects.
3. Share authorization certificate
DPOS for short, similar to board voting, token holders vote a certain number of nodes for proxy verification and accounting.
The working principle of DPOS, each shareholder has corresponding influence in proportion to their shareholding, the result of 51% shareholder vote will be irreversible and binding, the challenge is to achieve “51% approval” through a timely and efficient method. To achieve this, each shareholder can delegate its voting rights to a representative. The top 100 delegates with the most votes take turns producing blocks according to the established schedule. Each delegate is assigned a time period to produce blocks.
The voting mode of DPOS can generate a new block every 30 seconds, and under normal network conditions, the possibility of a blockchain fork is extremely small, and even if it occurs, it can be resolved within minutes.
The Internet has solved many problems that traditional business cannot solve. Blockchain can solve many problems that cannot be solved by the Internet, especially the problems of information flooding and lack of trust. These are the foundation of business.
Recently, it is reported that Luxshare Precision has won the assembly order for the new iPhone series for the first time. This is the first time that a mainland Chinese company has participated in the assembly of iPhone mobile phones. It has been in charge of Foxconn, Pegatron, Wistron and other companies before.
It is reported that Apple currently attaches great importance to Luxshare, not only taking tens of millions of assembly orders for new machines this year, but also having the possibility to increase in the future. It has the opportunity to surpass Pegatron in 2023 and become second only to Foxconn. The second largest generation factory.
Previously, Luxshare Precision was already an important supplier of Apple’s supply chain, mainly providing Apple with electro-acoustic components, connectors, etc., mainly used in AirPods headphones.
Nuvoton’s NUC140VE3AN is a full-speed USB 2.0 and CAN function, embedded Cortex™-M0 core, MCU running up to 50MHz, integrated 32K/64K/128K byte Flash memory, and 4K/8K /16K bytes of SRAM, 4K bytes of ROM for storing ISP boot codes, and 4K bytes of data Flash memory. There are also rich peripherals, such as timers, watchdog timers, RTC, PDMA, UART, SPI, I2C, I2S, PWM timers, GPIO, LIN, CAN, PS/2, USB 2.0 FS devices, 12 Bit ADC, analog comparator, low-voltage reset control and under-voltage detection functions, mainly used in industrial control, data communication, USB applications and motor control, automotive and consumer products. Keil’s MCBNUC1xx evaluation board can evaluate and test based on ARM Cortex™-M0 Nuvoton NUC1xx series processor features and working procedures. This article introduces the main features of NuMicro NUC140, block diagram, MCBNUC1xx evaluation board main features, block diagram and circuit diagram.
NuMicro™ NUC140 Connectivity Line with full-speed USB 2.0 and CAN functions, embedded Cortex™-M0 core, can run up to 50 MHz, built-in 32K/64K/128K bytes of Flash memory, and 4K/8K/16K bytes of SRAM , 4K bytes are used to store the ROM of the ISP boot code, and 4K bytes of data Flash memory. There are also rich peripherals, such as timers, watchdog timers, RTC, PDMA, UART, SPI, I2C, I2S, PWM timers, GPIO, LIN, CAN, PS/2, USB 2.0 FS devices, 12 Bit ADC, analog comparator, low-voltage reset control and under-voltage detection function.
Main features of NuMicro™ NUC140:
ARM® Cortex™-M0 core runs up to 50 MHz
-A 24-bit system timer
-Support low-power sleep mode
– Single-cycle 32-bit hardware multiplier
– Nested Vectored Interrupt Controller (NVIC) is used to control 32 interrupt sources, each interrupt source can be set to 4 priority levels
– Support serial wire debugging (SWD) with 2 observation points/4 breakpoints
• Built-in LDO, wide voltage working range 2.5 V to 5.5 V
• Flash memory
– 32K/64K/128K byte Flash is used to store program code
– 4KB flash is used to store ISP boot code
-Support in-system programming (ISP) way to update applications
– Support 512-byte single page erase
– The data FLASH address and size can be configured in the 128K byte system, and it is fixed to 4K byte data in the 32K byte and 64K byte system
– Support 2-wire ICP upgrade method through SWD/ICE interface
– Supports parallel high-speed programming mode of external programmer
• SRAM memory
– 4K/8K/16K bytes built-in SRAM
– Support PDMA mode
• PDMA (Peripheral DMA)
– Support 9-channel PDMA for automatic data transmission of SRAM and peripheral devices
• Clock control
– Flexible clock selection for different applications
– The internal 22.1184 MHz high-speed oscillator can be used for system operation
? At +25 ℃, VDD = 5.0 V, the accuracy is corrected to ± 1%
? Within the range of -40 ℃ ~ +85 ℃ and VDD = 2.5 V ~ 5.5 V, the accuracy is ± 3%
– The internal low-power 10 KHz low-speed oscillator is used for functions such as watchdog and wake-up from power-down mode
– Support a set of PLL, up to 50 MHz, for high-performance system operation
– External 4~24 MHz crystal oscillator input for USB and precise timing operation
– External 32.768 kHz crystal oscillator input for RTC and low power mode operation
– Four I/O modes:
Push-pull output mode
Open drain output mode
High-impedance input mode
-TTL/Schmitt trigger input optional
– I/O pins can be configured as interrupt sources in edge/level trigger mode
– Support high current drive and sink I/O mode
– Support 4 groups of 32-bit timers, each timer has a 24-bit up-counting timer and an 8-bit prescaler counter
– Each timer has an independent clock source
– Provide one-shot, periodic, toggle and continuous counting operation modes
-Support event counting function
-Support input capture function
• Watchdog Timer
– Multiple clock sources
– There are 8 optional time-out periods from 1.6ms to 26.0sec (depending on the selected clock source)
– WDT can be used as a wake-up in power-down mode/sleep mode
-Interrupt/reset selection for watchdog timer overflow
– Support software frequency compensation function through frequency compensation register (FCR)
-Support RTC counting (seconds, minutes, hours) and perpetual calendar functions (day, month, year)
-Support alarm register (second, minute, hour, day, month, year)
– Optional 12-hour clock or 24-hour clock
– Automatic leap year recognition
– Support cycle time tick interrupt, including 8 selectable cycles 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second
– Support wake-up function
– Built-in four 16-bit PWM generators, which can output 8 PWMs or 4 sets of complementary paired PWMs
– Each PWM generator is equipped with a clock source selector, a clock divider, an 8-bit clock prescaler and a dead zone generator for complementary paired PWM
– 8 channels of 16-bit capture timers (shared PWM timers) provide 8 channels of input rising/falling edge capture function
-Support capture interrupt
– Up to three groups of UART controllers
– Support flow control (TXD, RXD, CTS and RTS)
– UART0 with 64-byte FIFO for high-speed mode
– UART1/2 (optional) with 16-byte FIFO for standard mode
– Support IrDA (SIR) and LIN functions
– Support RS-485 9-bit mode and direction control
– Programmable baud rate generator frequency up to 1/16 system clock
– Support PDMA mode
– Support up to 4 groups of SPI controllers
– The host speed is as high as 32 MHz, and the slave is as high as 10 MHz (when the chip is working at 5V)
– Support SPI master/slave mode
– Full-duplex synchronous serial data transmission
– Variable data length (from 1 bit to 32 bit) transmission mode
Can set MSB or LSB first transmission mode
– Whether to receive or transmit on the rising or falling edge of the clock is independently configured
– 2 slave chip select lines when used as a master, 1 slave chip selection when used as a slave
– Support byte sleep mode in 32-bit transmission mode
– Support PDMA mode
– Support three-wire two-way interface without slave selection signal
– Support up to 2 groups of I2C devices
– Master/Slave mode
– Two-way data transmission between master and slave
– Multi-host bus support (no central host)
– Arbitration of data transmission between multiple hosts at the same time to avoid serial data damage on the bus
– The bus adopts a serial synchronous clock, which can realize transmission between devices at different rates
– The serial synchronous clock can be used as a handshake method to control the suspension and resume transmission of data on the bus
– Programmable clock is suitable for different rate control
– Support multiple address recognition on I2C bus (4 slave addresses with mask option)
– External audio CODEC interface
-Can be used as master or slave mode
– Can handle 8, 16, 24 and 32 bit words
– Support mono and stereo audio data
– Support I2S and most significant bit data format
– Provides two sets of 8-word FIFO data buffers, one set for sending and one set for receiving
– When the buffer exceeds the programmable boundary, an interrupt request is generated
– Supports two groups of DMA requests, one for sending and the other for receiving
• CAN 2.0
– Support CAN 2.0A and 2.0B protocol
– Bit transfer rate up to 1M bit/s
– 32 message objects
– Each message object has its own identifier mask
– Programmable FIFO mode (link message object)
– Disable automatic retransmission mode in time-triggered CAN applications
– Support power-down mode wake-up function
• PS/2 device controller
-Prohibit Host communication and request sending detection
– Receive frame error detection
-Programmable 1 to 16 bytes send buffer to reduce the burden on the CPU
– Double buffering of data received
– Software controllable bus
• USB 2.0 Full-Speed Device
– A set of 12Mbps USB 2.0 FS device
– On-chip integrated USB transceiver module
– Provide 1 set of interrupt sources and four interrupt events
Support control transmission (Control), bulk transmission (Bulk In/Out), interrupt transmission (Interrupt) and synchronous transmission. When there is no signal on the bus for 3ms, it has the function of automatic suspension
– Support 6 groups of programmable endpoints (endpoints)
– 512 bytes of internal SRAM as USB buffer area
– Support remote wake-up function
• Support EBI (External Bus Interface) (100-pin and 64-pin Package Only)
Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode
– Support 8-bit/16-bit data width
– Support byte write in 16-bit data width mode
– 12-bit ADC, conversion rate up to 700K SPS
– Up to 8 channels of single-ended mode input or 4 channels of differential mode input
– Single scan mode/single cycle scan mode/continuous scan mode
– Each channel has an independent result register
– Scan enable channel
– Threshold voltage detection
-Software programming or external pin trigger to start conversion
– Support PDMA mode
• Analog Comparator
– 2 sets of analog comparator modules
– The negative terminal potential can be selected from external input or internal band gap voltage
– The change of the comparison result can be used as an interrupt trigger condition
– Support power-down mode wake-up function
• Built-in temperature sensor, 1℃ resolution
• Brown-Out detector
– Support four-level detection voltage: 4.5 V/3.8 V/2.7 V/2.2 V
– Support under-voltage interrupt and reset options
• Low voltage reset
– Threshold voltage: 2.0 V
• Working temperature: -40℃~85℃
– Lead-free package (RoHS)
LQFP 100-pin / 64-pin / 48-pin
NuMicro™ NUC140 Connectivity Line Selection Guide
Figure 1. Block diagram of NuMicro™ NUC140
Figure 2. Outline drawing of MCBNUC1xx evaluation board
The Keil MCBNUC1xx Evaluation Board enables you to create and test working programs based on the Nuvoton NUC1xx family of ARM Cortex™-M0 processor-based devices.
Main features of MCBNUC1xx evaluation board:
50MHz NUC140VE3AN ARM Cortex™-M0 processor-based MCU in 100-pin LQFP
On-Chip Memory: 128KB Flash & 16KB RAM
USB 2.0 Full Speed Device Interface
UART, I2C, SPI and 76 GPIO via PCB headers
Potentiometer for ADC Input
8 LEDs and 3 push-buttons
Power via USB connector
Debug Interface Connectors
10-pin Cortex debug (0.05 inch connector)
20-pin ARM Standard JTAG (0.1 inch connector)
MCBNUC1xx evaluation board technical indicators:
4.0 x 2.75
100 x 70
I/O Port LEDs
10-pin Cortex Connector
20-pin JTAG Connector
~ 15 mA
~ 20 mA
The hardware block diagram displays the input, configuration, power system, and User I/O on the board. This visual presentation helps you to understand the MCBNUC1xx board components.
Figure 3. Block diagram of MCBNUC1xx evaluation board
Figure 4. MCBNUC1xx evaluation board circuit diagram
For details, see:
“The traditional brushed motor control uses a mechanical commutator and a brush to realize the motor control. The control is simple, but it is easy to generate sparks, and has high noise, short life and poor reliability. Compared with the brushless DC motor control technology, because it often uses the back EMF zero-crossing to detect the rotor position, it is easy to realize commutation, but it will cause problems such as large noise, large torque fluctuation, poor efficiency, and difficult detection of low-speed back EMF. .
Adaptive observer technology: a breakthrough to solve the difficult problems of brushed and brushless?
The traditional brushed motor control uses a mechanical commutator and a brush to realize the motor control. The control is simple, but it is easy to generate sparks, and has high noise, short life and poor reliability. Compared with the brushless DC motor control technology, because it often uses the back EMF zero-crossing to detect the rotor position, it is easy to realize commutation, but it will cause problems such as large noise, large torque fluctuation, poor efficiency, and difficult detection of low-speed back EMF. ;
At present, it is a common solution to use the brushless DC motor FOC control scheme instead of the traditional brushed control scheme, but there will be corresponding control difficulties. When the observer debugs the driving motor, it is difficult to achieve a better driving effect without detailed and complex software and hardware matching and debugging. In order to solve this difficult control problem, FengG Technology has independently developed an AO adaptive observer. Using this observer, the same program can not only start compatible with various types of motors, but also achieve ultra-low speed without losing synchronization.
Chips embedded in AO adaptive observer, such as: Peak GFU6861Q2, is a high-performance motor drive dedicated chip integrating motor control engine (ME) and 8051 core. The 8051 core handles routine transactions, and the ME handles motor real-time transactions. High performance motor control. Most of the 8051 core instruction cycles are 1T or 2T, and the chip integrates high-speed operational amplifiers, comparators, high-speed ADCs, multipliers/dividers, CRC, SPI, I2C, UART, various TIMER, PWM and other functions, built-in high-voltage LDO , suitable for square wave, SVPWM/SPWM, FOC drive control of BLDC/PMSM motors.
Figure 1 FU6861Q2 package pin diagram
Figure 2 Functional block diagram of FU6861Q2
What are the advantages of a vacuum cleaner control scheme using an adaptive observer?
A. Strong compatibility and high robustness
Traditional household vacuum cleaners are gradually being replaced by more convenient hand-held vacuum cleaners. The power supply method of lithium batteries and battery life have become the performance points that everyone is very concerned about. High-efficiency motor design is critical to the battery life of the vacuum cleaner. In order to design a vacuum cleaner in the best state, vacuum cleaner manufacturers will often adjust the number of turns or structure of the motor. If the traditional sliding film FOC scheme is used, since the angle is observed based on the motor model, the adjustment of the motor parameters will lead to the entire startup and operation. and efficiency need to be rematched.
Peak G Technology AO Adaptive Observer has strong compatibility. We tested 8 different vacuum cleaner motors, including V45, V55, V65, 3 common vacuum cleaner motors of different sizes, using the same product board + a set of fixed , each motor can start smoothly, and the estimator will not lose step at zero speed.
Figure 3 Several of the vacuum cleaners tested
B. Higher efficiency and lower noise
The drive angle is adaptively corrected by the built-in adaptive observer to realize the optimal angle drive. The maximum efficiency of the V45 model vacuum cleaner can reach 56% (as shown in Figure 4), while the efficiency of traditional vacuum cleaners is generally around 42%~52%. Therefore, the adaptive observer makes the solution more efficient, and brings a significant improvement to the battery life of the lithium battery-powered handheld vacuum cleaner.
Figure 4 Vacuum cleaner PQ test
The measured noise spectrum of a 1-pole, 200W, 7-blade vacuum cleaner shows that the harmonic component of FOC noise is significantly smaller than that of the square-wave driving method (as shown in Figures 5 and 6), which is better than the traditional brush and square-wave controlled vacuum cleaner solutions. Note: The two noise peaks in the figure are derived from the 7-fold wind noise and the double-frequency wind noise brought by the fan blades.
Fig.5 Noise spectrum diagram of vacuum cleaner driven by FOC
Figure 6. Noise spectrum of vacuum cleaner driven by square wave
C, dual-core drive to achieve ultra-high speed
It takes only 5.6us for a single ME core to complete a FOC operation. For the ultra-high-speed application of a 2-pole vacuum cleaner, the maximum speed will reach 150KRPM, and the electrical frequency will exceed 5KHZ. At this time, the carrier frequency should be at least about 50KHZ. This brings a great test to the FOC estimation speed. For the pure software FOC of ordinary single-chip microcomputers, it is difficult to meet the needs of high-speed motors. However, the dual-core driver chip of FengG Technology can achieve ultra-high speed, which is used in the practical application of vacuum cleaners. In the scheme, the measured electrical speed is close to 300KPM, and it can run stably (as shown in Figure 7).
Figure 7 2-pole vacuum cleaner, the electrical speed is close to the waveform of 290KRPM
D. The cost of the solution is low, the peripheral devices are few, and the circuit is simple
The vacuum cleaner solution using FU6861Q2, due to the high integration of the chip, reduces the number of peripheral components, saves the layout area, helps customers achieve a smaller and more compact product structure, reduces the cost of the solution BOM, and the product will have a more competitive advantage
Figure 8 Scheme comparison diagram
Figure 9 Application PCB
E. Configure rich development tools
In addition, in order to better support customers in developing vacuum cleaner products, FengG provides complete product development tools, such as:
SPI debugging simulator: You can observe the estimator angle, sampling current and other information in real time to determine whether the estimation and sampling are abnormal. As shown in Figure 10, when the sampling is abnormal, the red part is the current waveform displayed by the SPI, and the blue part is the actual phase current. waveform, it can be seen that there are obvious signal sampling errors. (The reason for the sampling current error here is that the minimum sampling window is too small); as shown in Figure 11, when the sampling is normal, the SPI and the actual phase current waveform can be seen to be in complete agreement.
Develop and test DEMO board: Feng G also designed a DEMO for vacuum cleaner customers to simulate the product board. Customers can drive their own motors in the fastest way, and can roughly understand the performance of the product at the beginning of product development, greatly shortening the time development cycle.
Figure 10 SPI waveform when sampling is abnormal (red is the SPI Display sampling waveform, blue is the actual phase current waveform)
Figure 11 When the sampling signal is normal, the sampling current fed back by the SPI and the actual phase current will exactly match
In the field of high-speed vacuum cleaner applications, FengG Technology has rich experience and a high market share, and has sustainable iterative optimization strategies in terms of efficiency, noise, robustness, compatibility, temperature rise and other issues. Committed to helping customers improve quality performance, reducing the design and development cycle of the program, and enhancing the overall competitive advantage, we will make unremitting efforts.