Electronic

Behavior of the gate-source voltage when the low-side switch is turned off

【Introduction】The following is an equivalent circuit and waveform diagram showing the current operation when the LS MOSFET is turned off. The events are numbered (IV), (V), (VI) as in turn-on. Compared with the turn-on time, only the order of VDS and ID changes has changed, and other basic actions are the same.

Behavior of the gate-source voltage when the low-side switch is turned off

The following is an equivalent circuit and waveform diagram showing the current behavior when the LS MOSFET is turned off. The events are numbered (IV), (V), (VI) as in turn-on. Compared with the turn-on time, only the order of VDS and ID changes has changed, and other basic actions are the same. The correspondence with the events at turn-on is as follows:

Behavior of the gate-source voltage when the low-side switch is turned off

Behavior of the gate-source voltage when the low-side switch is turned off

The rising VGS of LS and the negative surge of VGS of HS brought by dVDS/dt (waveform diagram T4) are events (IV).

The surge that occurs when ICGD1 disappears as shown in equation (1) at the end of the T4 period of the waveform diagram is the event (V). Equation (1) is the same as the one used before.

Behavior of the gate-source voltage when the low-side switch is turned off

Then, the drain current changes (waveform diagram T6), and the electromotive force caused by LSOURCE shown in equation (2) occurs, and the current flows as shown in event (VI) of the equivalent circuit. Equation (2) is also the same as the one used before.

The action that can be seen is that since this current charges the CGS of the MOSFET with the source side as the negative side, it pushes up VGS on the HS side and pulls it up toward the positive side on the LS side to prevent VGS from falling. The result is the VGS action shown in the waveform diagram. The dotted line of VGS in the waveform diagram represents the ideal voltage waveform.

Influence of External Gate Resistor

Below is the double-pulse test result when the LS of the SiC MOSFET bridge structure is turned off. (a) When the external gate resistance RG_EXT of the waveform diagram is 0Ω, (b) is 10Ω. (IV), (V), (VI) in the figure are the aforementioned events.

Behavior of the gate-source voltage when the low-side switch is turned off

As shown in the waveform, it can be seen that the surge of the event (V) is very pronounced.

Although the effect of the event (IV) caused by the change in VDS is small, the negative surge due to the event (IV) in the HS often exceeds the rated value, in this case, the circuit needs to be taken corresponding measures. To reduce this negative HS surge during turn-off, the HS gate resistor RG_EXT needs to be reduced. However, it should be noted that in the common gate resistance adjustment circuit described in the previous article, the event (IV) is more prominent on the RG_ON side where the resistance value is high.

Regarding the rise of VGS caused by the event (VI), since the moment is just before the end of the turn-off, even if the HS enters the turn-on action, the LS of the SiC MOSFET bridge structure has been turned off. broken, almost no problem.

(Source: Rohm)

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